Sprache: English | Deutsch | 中国的       Change Country

M68HC05 has a specific organization that is called a Von Neumann architecture after an American mathematician of the same name. In this architecture, a CPU and a memory array are interconnected by an address bus and a data bus. The address bus is used to identify which memory location is being accessed, and the data bus is used to convey information either from the CPU to the memory location (pigeon hole) or from the memory location to the CPU. In the Motorola implementation of this architecture, there are a few special pigeon holes (called CPU registers) inside the CPU, which act as a small scratch pad and control panel for the CPU. These CPU registers are similar to memory, in that information can be written into them and remembered. However, it is important to remember that these registers are directly wired into the CPU and are not part of the addressable memory available to the CPU.